We will admit it: mostly when we see a homebrew CPU design on an FPGA, it is a simple design that wouldn’t raise any eyebrows in the 1970s or 1980s. Not so with [Henry Wong’s] design, t… ...

In a superscalar design, it would require an enormous number of wires to connect each register directly to each ALU. This problem gets worse as the number of registers and ALUs increases.

It is often assumed that a superscalar architecture will require complex logic for pipeline control, and therefore will have high overhead in terms of power consumption. This assumption stems from the ...

At Interop 2009 in Las Vegas this week, RMI Corp unleashed its Superscalar XLP processor, the highest performing in the industry with unmatched system and performance scalability, the company said.

The superscalar microarchitecture of the V5 core increases the number of instructions that can be executed simultaneously, thereby increasing the performance of the core. With dual execution pipelines ...