TILERA presents also its multicore processor family which is TILE64[11]. This one presents 64 processors interconnected with TILERA‟s mesh NoC. In this work, we will implement a hierarchical design ...

Most on-chip networks that have been proposed, mostly utilize a 2D Mesh such as the networks found in the RAW processor [6], the TRIPS processor [7], the 80-node Intel’s Teraflops research chip [8], ...

Department of Computer Science, University of Virginia, Charlottesville, Virginia 22904, USA ...